Invention Grant
- Patent Title: Semiconductor device
-
Application No.: US14199584Application Date: 2014-03-06
-
Publication No.: US09245650B2Publication Date: 2016-01-26
- Inventor: Hiroki Inoue , Kei Takahashi , Tatsuya Onuki
- Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2013-052787 20130315
- Main IPC: H03L5/00
- IPC: H03L5/00 ; G11C27/02 ; H03K5/24

Abstract:
A sample-and-hold circuit including a transistor and a capacitor is connected to the differential circuit. The sample-and-hold circuit acquires voltage for correcting the offset voltage of the differential circuit by charging or discharging the capacitor through sampling operation. Then, it holds the potential of the capacitor through holding operation. In normal operation of the differential circuit, the output potential of the differential circuit is corrected by the potential held by the capacitor. The transistor in the sample-and-hold circuit is preferably a transistor whose channel is formed using an oxide semiconductor. An oxide semiconductor transistor has extremely low leakage current; thus, a change in the potential held in the capacitor of the sample-and-hold circuit can be minimized.
Public/Granted literature
- US20140266379A1 SEMICONDUCTOR DEVICE Public/Granted day:2014-09-18
Information query