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    Imaging device or imaging system
    2.
    发明授权
    Imaging device or imaging system 有权

    公开(公告)号：US11849234B2

    公开(公告)日：2023-12-19

    申请号：US17630074

    申请日：2020-07-28

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Seiichi Yoneda ,  Hiromichi Godo ,  Yusuke Negoro ,  Hiroki Inoue ,  Takahiro Fukutome

    IPC: H04N25/75 ,  H04N25/46 ,  H04N25/71

    CPC classification number: H04N25/75 ,  H04N25/46 ,  H04N25/745

    Abstract: An imaging device with a novel structure is provided. The imaging device includes an imaging region provided with a plurality of pixels. The plurality of pixels included in the imaging region include a first pixel and a second pixel. The imaging device has a function of selecting a first region or a second region. The first region includes the same number of pixels as the second region. The first region includes at least the first and second pixels. The second region includes at least the second pixel. The pixels included in the first region or the second region have a function of outputting imaging signals obtained by the pixels. The imaging device generates first image data by concurrently reading the imaging signals output from the pixels included in the first region and performing arithmetic operation on the signals. The imaging device generates second image data by concurrently reading the imaging signals output from the pixels included in the second region and performing arithmetic operation on the signals. A first conceptual image can be generated with the use of the first image data and the second image data.

    Amplifier circuit, latch circuit, and sensing device
    4.
    发明授权
    Amplifier circuit, latch circuit, and sensing device 有权

    公开(公告)号：US11531362B2

    公开(公告)日：2022-12-20

    申请号：US17265361

    申请日：2019-07-29

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Kei Takahashi ,  Yuto Yakubo ,  Hiroki Inoue

    IPC: G05F1/56 ,  H01L29/786 ,  H03F3/45 ,  H03K3/356

    Abstract: An output gain of a latch circuit is increased. The latch circuit includes a first circuit, a second circuit, and first to fourth transistors. The latch circuit includes a first input/output terminal and a second input/output terminal. The first circuit and the second circuit have a function of a current source. In the case where the third transistor is off and the fourth transistor is on, the latch circuit is supplied with a first input signal supplied to the first input/output terminal and a second input signal supplied to the second input/output terminal. In the case where the third transistor is on and the fourth transistor is off, an inverted signal of the first input signal is output to the first input/output terminal of the latch circuit, and an inverted signal of the second input signal is output to the second input/output terminal of the latch circuit. The first circuit and the second circuit increase the output gain of the latch circuit.

    Semiconductor device including photoelectric conversion element
    5.
    发明授权
    Semiconductor device including photoelectric conversion element 有权

    公开(公告)号：US11177299B2

    公开(公告)日：2021-11-16

    申请号：US15311261

    申请日：2015-05-27

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Yuki Okamoto ,  Yoshiyuki Kurokawa ,  Hiroki Inoue ,  Takuro Ohmaru

    IPC: H01L27/146 ,  H01L21/8234 ,  H01L27/088 ,  H01L27/12 ,  H01L29/786 ,  H01L31/075 ,  H04N5/225

    Abstract: A solid-state imaging device with high productivity and improved dynamic range is provided. In the imaging device including a photoelectric conversion element having an i-type semiconductor layer, functional elements, and a wiring, an area where the functional elements and the wiring overlap with the i-type semiconductor in a plane view is preferably less than or equal to 35%, further preferably less than or equal to 15%, and still further preferably less than or equal to 10% of the area of the i-type semiconductor in a plane view. Plural photoelectric conversion elements are provided in the same semiconductor layer, whereby a process for separating the respective photoelectric conversion elements can be reduced. The respective i-type semiconductor layers in the plural photoelectric conversion elements are separated by a p-type semiconductor layer or an n-type semiconductor layer.

    Semiconductor device
    6.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US10453846B2

    公开(公告)日：2019-10-22

    申请号：US14287285

    申请日：2014-05-27

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Takanori Matsuzaki ,  Shuhei Nagatsuka ,  Hiroki Inoue

    IPC: G11C11/24 ,  H01L27/105 ,  G11C8/08 ,  G11C11/403 ,  G11C11/405 ,  G11C11/408 ,  G11C16/02 ,  G11C16/04 ,  G11C16/08

    Abstract: A semiconductor device in which stored data can be held even when power is not supplied and there is no limitation on the number of writing operations is provided. A semiconductor device is formed using a material which can sufficiently reduce the off-state current of a transistor, such as an oxide semiconductor material that is a wide-gap semiconductor. When a semiconductor material which can sufficiently reduce the off-state current of a transistor is used, the semiconductor device can hold data for a long period. In addition, by providing a capacitor or a noise removal circuit electrically connected to a write word line, a signal such as a short pulse or a noise input to a memory cell can be reduced or removed. Accordingly, a malfunction in which data written into the memory cell is erased when a transistor in the memory cell is instantaneously turned on can be prevented.

    Semiconductor device having transistor and capacitor
    7.
    发明授权
    Semiconductor device having transistor and capacitor 有权

    公开(公告)号：US09793276B2

    公开(公告)日：2017-10-17

    申请号：US14935607

    申请日：2015-11-09

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Kiyoshi Kato ,  Shuhei Nagatsuka ,  Hiroki Inoue ,  Takanori Matsuzaki

    IPC: H01L27/105 ,  H01L27/108 ,  H01L27/1156 ,  H01L27/12

    CPC classification number: H01L27/108 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/1156 ,  H01L27/1225

    Abstract: A semiconductor device with a novel structure in which stored data can be held even when power is not supplied and there is no limitation on the number of times of writing. In the semiconductor device, a plurality of memory cells each including a first transistor, a second transistor, and a capacitor is provided in matrix and a wiring (also called a bit line) for connecting one memory cell to another memory cell and a source or drain electrode of the first transistor are electrically connected to each other through a source or drain electrode of the second transistor. Accordingly, the number of wirings can be smaller than that in the case where the source or drain electrode of the first transistor and the source or drain electrode of the second transistor are connected to different wirings. Thus, the degree of integration of the semiconductor device can be increased.

    Semiconductor device and electronic device
    8.
    发明授权
    Semiconductor device and electronic device 有权

    公开(公告)号：US09647665B2

    公开(公告)日：2017-05-09

    申请号：US14967553

    申请日：2015-12-14

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Hiroki Inoue ,  Takanori Matsuzaki ,  Shuhei Nagatsuka ,  Takahiko Ishizu ,  Tatsuya Onuki

    IPC: H03L5/00 ,  H03K19/0185 ,  H03K19/00

    CPC classification number: H03K19/018521 ,  H03K3/356104 ,  H03K19/0016

    Abstract: To provide a semiconductor device that inhibits unexpected output of a high-level signal immediately after the rise of a power supply voltage. A semiconductor device includes a first buffer circuit, a level shifter circuit, and a second buffer circuit. A first potential is supplied to the first buffer circuit, and a second potential is supplied to the level shifter circuit and the second buffer circuit; consequently, the semiconductor device returns to a normal state. The first potential is supplied to the first buffer circuit before the second potential is supplied to the level shifter circuit and the second buffer circuit, whereby the operations of the level shifter circuit and the second buffer circuit can be controlled. This inhibits unexpected output of a high-level signal to a wiring connected to the second buffer circuit.

    Imaging device and electronic device
    9.
    发明授权
    Imaging device and electronic device 有权
    成像设备和电子设备

    公开(公告)号：US09576995B2

    公开(公告)日：2017-02-21

    申请号：US14837791

    申请日：2015-08-27

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Hiroki Inoue ,  Yoshiyuki Kurokawa ,  Takayuki Ikeda ,  Yuki Okamoto

    IPC: H01L29/10 ,  H01L27/146 ,  H01L29/786 ,  H01L29/24

    CPC classification number: H01L27/14612 ,  H01L27/14614 ,  H01L27/14689 ,  H01L27/14692 ,  H01L29/24 ,  H01L29/7869

    Abstract: An imaging device capable of obtaining high-quality imaging data is provided. The imaging device includes a first circuit, a second circuit and a third circuit. The first circuit includes a photoelectric conversion element, a plurality of transistors including an amplifier transistor, and a plurality of capacitors. The second circuit includes a transistor. The third circuit includes a resistor and a transistor for controlling a current flowing in the resistor. The output signal of the imaging device is determined in accordance with the current flowing in the resistor. Variations in electrical characteristics of the amplifier transistor included in the first circuit can be compensated.

    Abstract translation: 提供能够获得高质量成像数据的成像装置。 成像装置包括第一电路，第二电路和第三电路。 第一电路包括光电转换元件，包括放大器晶体管的多个晶体管和多个电容器。 第二电路包括晶体管。 第三电路包括用于控制在电阻器中流动的电流的电阻器和晶体管。 成像装置的输出信号根据电阻中流过的电流来确定。 可以补偿包括在第一电路中的放大器晶体管的电特性的变化。

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