发明授权
- 专利标题： Integrated split gate non-volatile memory cell and logic device
- 专利标题（中）： 集成分离门非易失性存储单元和逻辑器件
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申请号： US13972372申请日： 2013-08-21
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公开(公告)号： US09252246B2公开(公告)日： 2016-02-02
- 发明人: Asanga H. Perera , Cheong Min Hong , Sung-Taeg Kang , Jane A. Yater
- 申请人： Asanga H. Perera , Cheong Min Hong , Sung-Taeg Kang , Jane A. Yater
- 申请人地址： US TX Austin
- 专利权人： FREESCALE SEMICONDUCTOR, INC.
- 当前专利权人： FREESCALE SEMICONDUCTOR, INC.
- 当前专利权人地址： US TX Austin
- 主分类号： H01L21/336
- IPC分类号： H01L21/336 ; H01L29/66 ; H01L21/28 ; H01L29/423 ; H01L27/115
摘要：
A method of making a semiconductor structure includes forming a select gate and a charge storage layer in an NVM region. A control gate is formed by depositing a conformal layer followed by an etch back. A patterned etch results in leaving a portion of the charge storage layer over the select gate and under the control gate and to remove the charge storage layer from the logic region. A logic gate structure formed in a logic region has a metal work function surrounded by an insulating layer.
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