Invention Grant
US09256376B2 Methods and circuits for dynamically scaling DRAM power and performance
有权
动态缩放DRAM功率和性能的方法和电路
- Patent Title: Methods and circuits for dynamically scaling DRAM power and performance
- Patent Title (中): 动态缩放DRAM功率和性能的方法和电路
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Application No.: US14452373Application Date: 2014-08-05
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Publication No.: US09256376B2Publication Date: 2016-02-09
- Inventor: Ely Tsern , Thomas Vogelsang , Craig Hampel , Scott C. Best
- Applicant: Rambus Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: Rambus Inc.
- Current Assignee: Rambus Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Silicon Edge Law Group LLP
- Agent Arthur J. Behiel
- Main IPC: G11C7/00
- IPC: G11C7/00 ; G06F3/06 ; G11C11/4074 ; G06F1/26 ; G11C5/14

Abstract:
A memory system supports high-performance and low-power modes. The memory system includes a memory core and a core interface. The memory core employs core supply voltages that remain the same in both modes. Supply voltages and signaling rates for the core interface may be scaled down to save power. Level shifters between the memory core and core interface level shift signals as needed to accommodate the signaling voltages used by the core interface in the different modes.
Public/Granted literature
- US20150033044A1 Methods and Circuits for Dynamically Scaling DRAM Power and Performance Public/Granted day:2015-01-29
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