Invention Grant
- Patent Title: Knowledge-based analog layout generator
- Patent Title (中): 基于知识的模拟布局发生器
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Application No.: US14476320Application Date: 2014-09-03
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Publication No.: US09256706B2Publication Date: 2016-02-09
- Inventor: Tung-Chieh Chen , Po-Hsun Wu , Po-Hung Lin , Tsung-Yi Ho
- Applicant: Synopsys Taiwan Co., Ltd.
- Applicant Address: TW Taipei
- Assignee: Synopsys Taiwan Co., Ltd.
- Current Assignee: Synopsys Taiwan Co., Ltd.
- Current Assignee Address: TW Taipei
- Agency: Alston & Bird LLP
- Agent Ardeshir Tabibi, Esq.
- Main IPC: G06F9/455
- IPC: G06F9/455 ; G06F17/50

Abstract:
A computer-implemented method for generating a layout of a design includes invoking the computer to receive a schematic representation of the design, generating a connection graph associated with the design, comparing the connection graph with a plurality of connection graphs stored in a database and selecting a layout associated with the matching connection graph in generating the layout of the design.
Public/Granted literature
- US20150067626A1 KNOWLEDGE-BASED ANALOG LAYOUT GENERATOR Public/Granted day:2015-03-05
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