公开(公告)号：US09256706B2

公开(公告)日：2016-02-09

申请号：US14476320

申请日：2014-09-03

Applicant: Synopsys Taiwan Co., Ltd.

Inventor： Tung-Chieh Chen ,  Po-Hsun Wu ,  Po-Hung Lin ,  Tsung-Yi Ho

IPC: G06F9/455 ,  G06F17/50

CPC classification number: G06F17/5077 ,  G06F17/5063 ,  G06F17/5072 ,  G06F17/5081

Abstract: A computer-implemented method for generating a layout of a design includes invoking the computer to receive a schematic representation of the design, generating a connection graph associated with the design, comparing the connection graph with a plurality of connection graphs stored in a database and selecting a layout associated with the matching connection graph in generating the layout of the design.

Abstract translation: 用于生成设计布局的计算机实现的方法包括调用计算机以接收设计的示意图，生成与设计相关联的连接图，将连接图与存储在数据库中的多个连接图进行比较，并选择 在生成设计布局时与匹配连接图相关联的布局。

公开(公告)号：US20150143322A1

公开(公告)日：2015-05-21

申请号：US14541359

申请日：2014-11-14

Applicant: Synopsys Taiwan Co., Ltd.

Inventor： Jui-Hsiang Liu ,  Hsin-I Lin ,  Tung-Chieh Chen

IPC: G06F17/50

CPC classification number: G06F17/5072 ,  G06F17/5077

Abstract: A designer uses an option device to switch one or more signal flows in a schematic design to create different versions for the same design. Currently, there is no related automatic tool for the automatic placement of option devices. In various embodiments, option device instances are used to decide option device positions. Option devices can be automatically placed and routing considered and adjusted as needed.

Abstract translation: 设计师使用选项设备在原理图设计中切换一个或多个信号流，以为相同的设计创建不同的版本。 目前，没有相关的自动放置选项设备的自动工具。 在各种实施例中，使用选项设备实例来决定选项设备位置。 选项设备可以自动放置，并根据需要考虑和调整路由。

公开(公告)号：US20170316143A1

公开(公告)日：2017-11-02

申请号：US15654363

申请日：2017-07-19

Applicant: Synopsys Taiwan Co., Ltd.

Inventor： Chien-Hung Lu ,  Chun-Chen Chi ,  Tung-Chieh Chen ,  Kai-Chih Chi

IPC: G06F17/50

Abstract: A computer implemented method of routing a net of an electronic circuit is disclosed. The net connects a plurality of pins of the electronic circuit. The method includes selecting, using one or more computer systems, first and second main spine routing tracks for respective first and second groups of pins of the net. The method also includes generating, using one or more computer systems, a first main spine wire on the selected first main spine routing track and a second main spine wire on the selected second main spine routing track. A router configured to perform the method is also disclosed.

公开(公告)号：US09311441B2

公开(公告)日：2016-04-12

申请号：US14541359

申请日：2014-11-14

Applicant: Synopsys Taiwan Co., Ltd.

Inventor： Jui-Hsiang Liu ,  Hsin-I Lin ,  Tung-Chieh Chen

IPC: G06F17/50

CPC classification number: G06F17/5072 ,  G06F17/5077

Abstract: A designer uses an option device to switch one or more signal flows in a schematic design to create different versions for the same design. Currently, there is no related automatic tool for the automatic placement of option devices. In various embodiments, option device instances are used to decide option device positions. Option devices can be automatically placed and routing considered and adjusted as needed.

Abstract translation: 设计师使用选项设备在原理图设计中切换一个或多个信号流，以为相同的设计创建不同的版本。 目前，没有相关的自动放置选项设备的自动工具。 在各种实施例中，使用选项设备实例来决定选项设备位置。 选项设备可以自动放置，并根据需要考虑和调整路由。

公开(公告)号：US09286433B2

公开(公告)日：2016-03-15

申请号：US14082885

申请日：2013-11-18

Applicant: Synopsys Taiwan Co. Ltd. ,  Synopsys, Inc.

Inventor： Tung-Chieh Chen ,  Hung-Ming Chen ,  Yi-Peng Weng

IPC: G06F9/455 ,  G06F17/50

CPC classification number: G06F17/5081 ,  G06F17/5072 ,  G06F2217/06

Abstract: A computer implemented method for forming an integrated circuit (IC) layout is presented. The method includes forming a constraint tree when a computer is invoked to receive a first layout of the IC and generating a second layout of the IC in accordance with the constraint tree.

Abstract translation: 提出了一种用于形成集成电路（IC）布局的计算机实现方法。 该方法包括当调用计算机以接收IC的第一布局并根据约束树生成IC的第二布局时，形成约束树。

公开(公告)号：US20150007123A1

公开(公告)日：2015-01-01

申请号：US14486723

申请日：2014-09-15

Applicant: Synopsys Taiwan Co., LTD.

Inventor： Fong-Yuan Chang ,  Sheng-Hsiung Chen ,  Tung-Chieh Chen ,  Ren-Song Tsay ,  Wai-Kei Mak

IPC: G06F17/50

CPC classification number: G06F17/5077 ,  G06F17/5068 ,  G06F17/5072 ,  G06F17/5081

Abstract: A computer implemented method for designing an integrated circuit (IC) having dimensions along first and second directions, and comprising at least a first block is presented. The method includes evaluating a demand ratio for the first block, the demand ratio being reflective of a ratio of a conductive wiring demand along the first direction and a conductive wiring demand along the second direction, when the computer is invoked to evaluate the demand ration for the first block. The method further includes creating one or more wiring reservation blocks in accordance with the demand ratio.

Abstract translation: 一种用于设计具有沿着第一和第二方向的尺寸并且包括至少第一块的集成电路（IC）的计算机实现的方法。 所述方法包括评估所述第一块的需求比，所述需求比反映了沿着所述第一方向的导电布线需求的比率和所述第二方向上的导电布线需求，当所述计算机被调用以评估所述需求比率时， 第一块。 该方法还包括根据需求比率创建一个或多个布线预约块。

公开(公告)号：US08875081B2

公开(公告)日：2014-10-28

申请号：US13778071

申请日：2013-02-26

Applicant: Synopsys Taiwan Co., Ltd. ,  Synopsys, Inc.

Inventor： Fong-Yuan Chang ,  Sheng-Hsiung Chen ,  Tung-Chieh Chen ,  Ren-Song Tsay ,  Wai-Kei Mak

IPC: G06F17/50

CPC classification number: G06F17/5077 ,  G06F17/5068 ,  G06F17/5072 ,  G06F17/5081

Abstract: A method for designing and making an integrated circuit is described. That method utilizes statistical models of wire segments to accurately estimate the expected length of minimum-length, orthogonal wire segments within a block. From these estimates, the method accurately estimates an ratio between the horizontal and vertical routing resources required, termed the “H/V Demand Ratio.” From the H/V Demand Ratio, an accurate estimate of the height and width of the block may be determined. Thereafter, placement and routing may be performed quickly and accurately, thereby allowing the block to be designed and manufactured quickly and cost effectively. A method for designing an integrated circuit with efficient metal-1 resource utilization is also described.

Abstract translation: 描述了一种用于设计和制造集成电路的方法。 该方法使用线段的统计模型来精确估计块内最小长度正交线段的预期长度。 根据这些估计，该方法精确地估计所需的水平和垂直路由资源之间的比例，称为“H / V需求比”。从H / V需求比率来看，块的高度和宽度的准确估计可以是 决心。 此后，可以快速且准确地执行放置和布线，从而允许块被快速且成本有效地设计和制造。 还描述了一种设计具有有效的金属-1资源利用的集成电路的方法。

公开(公告)号：US20140075402A1

公开(公告)日：2014-03-13

申请号：US14082885

申请日：2013-11-18

Applicant: Synopsys, Inc. ,  Synopsys Taiwan Co. Ltd.

Inventor： Tung-Chieh Chen ,  Hung-Ming Chen ,  Yi-Peng Weng

IPC: G06F17/50

CPC classification number: G06F17/5081 ,  G06F17/5072 ,  G06F2217/06

Abstract: A computer implemented method for forming an integrated circuit (IC) layout is presented. The method includes forming a constraint tree when a computer is invoked to receive a first layout of the IC and generating a second layout of the IC in accordance with the constraint tree.

Abstract translation: 提出了一种用于形成集成电路（IC）布局的计算机实现方法。 该方法包括当调用计算机以接收IC的第一布局并根据约束树生成IC的第二布局时，形成约束树。