Invention Grant
US09257199B2 Canary circuit with passgate transistor variation 有权
金丝雀电路与通道晶体管变化

Canary circuit with passgate transistor variation
Abstract:
A canary circuit with passgate transistor variation is described herein. The canary circuit includes a memory canary circuit that has a plurality of bitcells. Each bitcell has at least a passgate transistor that is driven by a wordline voltage. The canary circuit further includes a regulator circuit that outputs a wordline voltage that accounts for a predetermined offset of a threshold voltage of the passgate transistor. In an embodiment, the regulator circuit is a subtractor circuit that generates the wordline voltage from a reference voltage based in part on the threshold voltage variation of the passgate transistor.
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