Invention Grant
US09257359B2 System and method to process horizontally aligned graphite nanofibers in a thermal interface material used in 3D chip stacks
有权
在3D芯片堆叠中使用的热界面材料中处理水平对准的石墨纳米纤维的系统和方法
- Patent Title: System and method to process horizontally aligned graphite nanofibers in a thermal interface material used in 3D chip stacks
- Patent Title (中): 在3D芯片堆叠中使用的热界面材料中处理水平对准的石墨纳米纤维的系统和方法
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Application No.: US13188572Application Date: 2011-07-22
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Publication No.: US09257359B2Publication Date: 2016-02-09
- Inventor: Joseph Kuczynski , Arvind K. Sinha , Kevin A. Splittstoesser , Timothy J. Tofil
- Applicant: Joseph Kuczynski , Arvind K. Sinha , Kevin A. Splittstoesser , Timothy J. Tofil
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Stachler Intellectual Property Law LLC
- Agent Robert R. Williams
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/50 ; H01L23/36 ; H01L23/373 ; H01L23/42 ; H01L23/427 ; H01L25/065 ; H01L23/00

Abstract:
The chip stack of semiconductor chips with enhanced cooling apparatus includes a first chip with circuitry on a first side and a second chip electrically and mechanically coupled to the first chip by a grid of connectors. The apparatus further includes a thermal interface material pad placed between the first chip and the second chip, wherein the thermal interface material pad includes nanofibers aligned parallel to mating surfaces of the first chip and the second chip. The method includes creating a first chip with circuitry on a first side and creating a second chip electrically and mechanically coupled to the first chip by a grid of connectors. The method further includes placing a thermal interface material pad between the first chip and the second chip, wherein the thermal interface material pad includes nanofibers aligned parallel to mating surfaces of the first chip and the second chip.
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