Invention Grant
- Patent Title: Combining cut mask lithography and conventional lithography to achieve sub-threshold pattern features
- Patent Title (中): 组合切割掩模光刻和常规光刻以实现亚阈值图案特征
-
Application No.: US13864344Application Date: 2013-04-17
-
Publication No.: US09263279B2Publication Date: 2016-02-16
- Inventor: John J. Zhu , Zhongze Wang , Da Yang
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM INCORPORATED
- Current Assignee: QUALCOMM INCORPORATED
- Current Assignee Address: US CA San Diego
- Agency: Seyfarth Shaw LLP
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L21/31 ; H01L21/469 ; H01L21/283 ; H01L21/768 ; H01L23/50 ; G03F7/20 ; H01L23/00
Abstract:
Features are fabricated on a semiconductor chip. The features are smaller than the threshold of the lithography used to create the chip. A method includes patterning a first portion of a feature (such as a local interconnect) and a second portion of the feature to be separated by a predetermined distance, such as a line tip to tip space or a line space. The method further includes patterning the first portion with a cut mask to form a first sub-portion (e.g., a contact) and a second sub-portion. A dimension of the first sub-portion is less than a dimension of a second predetermined distance, which may be a line length resolution of a lithographic process having a specified width resolution. A feature of a semiconductor device includes a first portion and a second portion having a dimension less than a lithographic resolution of the first portion.
Public/Granted literature
- US20140312500A1 COMBINING CUT MASK LITHOGRAPHY AND CONVENTIONAL LITHOGRAPHY TO ACHIEVE SUB-THRESHOLD PATTERN FEATURES Public/Granted day:2014-10-23
Information query
IPC分类:
