Invention Grant
US09263375B2 System, method and apparatus for leadless surface mounted semiconductor package
有权
无铅表面贴装半导体封装的系统,方法和装置
- Patent Title: System, method and apparatus for leadless surface mounted semiconductor package
- Patent Title (中): 无铅表面贴装半导体封装的系统,方法和装置
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Application No.: US14341292Application Date: 2014-07-25
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Publication No.: US09263375B2Publication Date: 2016-02-16
- Inventor: Lakshminarayan Viswanathan , Lakshmi N. Ramanathan , Audel A. Sanchez , Fernando A. Santos
- Applicant: Lakshminarayan Viswanathan , Lakshmi N. Ramanathan , Audel A. Sanchez , Fernando A. Santos
- Applicant Address: US TX Austin
- Assignee: FREESCALE SEMICONDUCTOR, INC.
- Current Assignee: FREESCALE SEMICONDUCTOR, INC.
- Current Assignee Address: US TX Austin
- Main IPC: H01L23/495
- IPC: H01L23/495 ; H01L23/00 ; H01L21/56 ; H01L21/48 ; H01L23/31 ; H01L23/367

Abstract:
A packaged semiconductor device may include a termination surface having terminations configured as leadless interconnects to be surface mounted to a printed circuit board. A first flange has a first surface and a second surface. The first surface provides a first one of the terminations, and the second surface is opposite to the first surface. A second flange also has a first surface and a second surface, with the first surface providing a second one of the terminations, and the second surface is opposite to the first surface. A die is mounted to the second surface of the first flange with a material having a melting point in excess of 240° C. An electrical interconnect extends between the die and the second surface of the second flange opposite the termination surface, such that the electrical interconnect, first flange and second flange are substantially housed within a body.
Public/Granted literature
- US20140332941A1 SYSTEM, METHOD AND APPARATUS FOR LEADLESS SURFACE MOUNTED SEMICONDUCTOR PACKAGE Public/Granted day:2014-11-13
Information query
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