Invention Grant
- Patent Title: Methods for testing integrated circuits of wafer and testing structures for integrated circuits
- Patent Title (中): 集成电路晶圆和测试结构集成电路测试方法
-
Application No.: US13915947Application Date: 2013-06-12
-
Publication No.: US09269642B2Publication Date: 2016-02-23
- Inventor: Michael T. Coster , Mark A. DiRocco , Jeffrey P. Gambino , Kirk D. Peterson
- Applicant: GLOBALFOUNDRIES INC.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Hoffman Warnick LLC
- Agent David Cain
- Main IPC: H01L21/66
- IPC: H01L21/66 ; H01L33/62 ; H01L23/48

Abstract:
Aspects of the present invention relate to methods of testing an integrated circuit of a wafer and testing structures for integrated circuits. The methods include depositing a sacrificial material over a first conductor material of the integrated circuit, and contacting a test probe to the deposited sacrificial material. The methods can also include testing the integrated circuit using the test probe contacting the sacrificial material. Finally, the methods can include removing the sacrificial material over the first conductor material of the integrated circuit subsequent to the testing of the integrated circuit.
Public/Granted literature
- US20140367684A1 METHODS FOR TESTING INTEGRATED CIRCUITS OF WAFER AND TESTING STRUCTURES FOR INTEGRATED CIRCUITS Public/Granted day:2014-12-18
Information query
IPC分类: