Invention Grant
US09269642B2 Methods for testing integrated circuits of wafer and testing structures for integrated circuits 有权
集成电路晶圆和测试结构集成电路测试方法

Methods for testing integrated circuits of wafer and testing structures for integrated circuits
Abstract:
Aspects of the present invention relate to methods of testing an integrated circuit of a wafer and testing structures for integrated circuits. The methods include depositing a sacrificial material over a first conductor material of the integrated circuit, and contacting a test probe to the deposited sacrificial material. The methods can also include testing the integrated circuit using the test probe contacting the sacrificial material. Finally, the methods can include removing the sacrificial material over the first conductor material of the integrated circuit subsequent to the testing of the integrated circuit.
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