Invention Grant
- Patent Title: Trim-matched segmented digital-to-analog converter apparatus, systems and methods
- Patent Title (中): 微调匹配分段数模转换器装置,系统和方法
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Application No.: US14719931Application Date: 2015-05-22
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Publication No.: US09276598B1Publication Date: 2016-03-01
- Inventor: Qunying Li , Joao Carlos Brito
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent John R. Pessetto; Frank D. Cimino
- Main IPC: H03M1/10
- IPC: H03M1/10 ; H03M1/78 ; H03M1/80 ; H03M1/68

Abstract:
One or more high-order bit linear branches of a segmented DAC are implemented as R-2R networks geometrically down-scaled from the DAC binary portion by a selected factor. The resulting increase in closely-located mismatch is compensated for by implementing a trim circuit at a low-order end of each such linear branch. The trim circuit is designed with a number of trim steps to compensate for the selected linear branch down-scaling factor. Each trim step switches a resistance into the low-order end of the linear branch resulting in an even resistance increment or decrement at the lumped linear branch output. The trim circuit is calibrated to provide an amount of trim at the linear branch output such that the lumped resistance of the trimmed linear branch matches the lumped resistance of the binary portion within a selected tolerance (e.g., generally +/−0.5 LSB).
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