Invention Grant
- Patent Title: Optimized multi-pass rendering on tiled base architectures
- Patent Title (中): 在平铺基础架构上优化多遍渲染
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Application No.: US14154996Application Date: 2014-01-14
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Publication No.: US09280845B2Publication Date: 2016-03-08
- Inventor: Murat Balci , Christopher Paul Frascati , Avinash Seetharamaiah
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Shumaker & Sieffert, P.A.
- Main IPC: G06T15/00
- IPC: G06T15/00

Abstract:
The present disclosure provides systems and methods for multi-path rendering on tile based architectures including executing, with a graphics processing unit (GPU), a query pass, executing, with the GPU, a condition true pass based on the query pass without executing a flush operation, executing, with the GPU, a condition false pass based on the query pass without executing a flush operation, and responsive to executing the condition true pass and the condition false pass, executing, with the GPU, a flush operation.
Public/Granted literature
- US20150187117A1 OPTIMIZED MULTI-PASS RENDERING ON TILED BASE ARCHITECTURES Public/Granted day:2015-07-02
Information query
IPC分类:
G | 物理 |
G06 | 计算;推算或计数 |
G06T | 一般的图像数据处理或产生 |
G06T15/00 | 3D〔三维〕图像的加工 |