Invention Grant
- Patent Title: Embedded memory and power management subpackage
- Patent Title (中): 嵌入式内存和电源管理子包
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Application No.: US14104877Application Date: 2013-12-12
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Publication No.: US09287248B2Publication Date: 2016-03-15
- Inventor: John S. Guzek , Debendra Mallik , Sasha N. Oster , Timothy E. McIntosh
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L23/52
- IPC: H01L23/52 ; H01L25/18 ; H01L25/00 ; H01L23/00 ; H01L23/48 ; H01L23/31 ; H01L23/367 ; H01L23/538 ; H01L23/498

Abstract:
Embodiment of the present disclosure describe integrated circuit package assemblies that allow for relatively short connections between devices such as a processor and memory. In one embodiment, a package assembly includes a die embedded in a subpackage directly coupled to another die attached to the subpackage. In some embodiments the subpackage may also contain power management devices. In some embodiments the die embedded in the subpackage and/or the power management device may overlap, or be located in, a region defined by the die coupled to the subpackage such that they are located between the die coupled to the subpackage and a substrate underlying the subpackage. Other embodiments may be described and/or claimed.
Public/Granted literature
- US20150171065A1 EMBEDDED MEMORY AND POWER MANAGEMENT SUBPACKAGE Public/Granted day:2015-06-18
Information query
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