Invention Grant
- Patent Title: Electronic circuit device
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Application No.: US14495303Application Date: 2014-09-24
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Publication No.: US09293453B2Publication Date: 2016-03-22
- Inventor: Haruka Shimizu , Natsuki Yokoyama
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Mattingly & Malur, PC
- Priority: JP2010-055410 20100312
- Main IPC: H01L27/06
- IPC: H01L27/06 ; H01L21/82 ; H01L29/66 ; H01L29/808 ; H01L29/868 ; H01L23/00 ; H01L29/16

Abstract:
A normally-off type silicon carbide junction FET has a problem that the gate thereof is not easy to use due to inferiority in the characteristics of it. This problem occurs because in order to achieve normally-off, the gate voltage should be off at 0V and at the same time, the ON-state gate voltage should be suppressed to about 2.5V to prevent the passage of an electric current through a pn junction between gate and source. Accordingly, a range from the threshold voltage to the ON-state gate voltage is only from about 1 V to 2V and it is difficult to control the gate voltage. Provided in the present invention is an electronic circuit device obtained by coupling, to a gate of a normally-off type silicon carbide junction FET, an element having a capacitance equal to or a little smaller than the gate capacitance of the junction FET.
Public/Granted literature
- US20150041829A1 ELECTRONIC CIRCUIT DEVICE Public/Granted day:2015-02-12
Information query
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