Invention Grant
US09299610B2 Method for manufacturing a transistor with self-aligned terminal contacts
有权
制造具有自对准端子触点的晶体管的方法
- Patent Title: Method for manufacturing a transistor with self-aligned terminal contacts
- Patent Title (中): 制造具有自对准端子触点的晶体管的方法
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Application No.: US14714738Application Date: 2015-05-18
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Publication No.: US09299610B2Publication Date: 2016-03-29
- Inventor: Andrea Paleari , Giuseppe Croce
- Applicant: STMicroelectronics S.r.l.
- Applicant Address: IT Agrate Brianza
- Assignee: STMICROELECTRONICS S.R.L.
- Current Assignee: STMICROELECTRONICS S.R.L.
- Current Assignee Address: IT Agrate Brianza
- Agency: Gardere Wynne Sewell LLP
- Priority: ITMI2012A1244 20120717
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L29/66 ; H01L29/78 ; H01L29/417 ; H01L29/10 ; H01L21/74 ; H01L21/8234 ; H01L29/06 ; H01L29/423

Abstract:
A MOS transistor includes a semiconductor layer with a drain region and a body region. A first insulating layer is disposed over the semiconductor layer, a gate-precursor layer is disposed over the first insulating layer, a second insulating layer disposed over the first insulating layer and a third insulating layer disposed over the second insulating layer. A source opening extends through the third insulating layer, the second insulating layer, the gate-precursor layer, and the first insulating layer. An implant through the source opening forms a source-precursor region in the semiconductor layer. The source opening is then lined and an body contact opening is made through the liner, the source-precursor region and into the body region. An implant through the body contact opening forms the body contact region below the source-precursor. The body contact opening is then filled with a metal.
Public/Granted literature
- US20150255341A1 METHOD FOR MANUFACTURING A TRANSISTOR WITH SELF-ALIGNED TERMINAL CONTACTS Public/Granted day:2015-09-10
Information query
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