Invention Grant
- Patent Title: Stacked semiconductor structure and manufacturing method for the same
- Patent Title (中): 堆叠的半导体结构和制造方法相同
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Application No.: US14159657Application Date: 2014-01-21
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Publication No.: US09299624B2Publication Date: 2016-03-29
- Inventor: Hsin-Ming Hou , Ji-Fu Kung
- Applicant: United Microelectronics Corp.
- Applicant Address: TW Hsinchu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Hsinchu
- Agency: WPAT, PC
- Agent Justin King
- Main IPC: H01L21/66
- IPC: H01L21/66 ; H01L25/07 ; H01L25/00 ; H01L23/538

Abstract:
A stacked semiconductor structure and a manufacturing method for the same are provided. The stacked semiconductor structure is provided, which comprises a first semiconductor substrate, a second semiconductor substrate, a dielectric layer, a trench, a via, and a conductive structure. The first semiconductor substrate comprises a first substrate portion and a first conductive layer on an active surface of the first substrate portion. The second semiconductor substrate comprises a second substrate portion and a second conductive layer on an active surface of the second substrate portion. The trench passes through the second substrate portion and exposing the second conductive layer. The via passes through the dielectric layer and exposes the first conductive layer. The conductive structure has an upper portion filling the trench and a lower portion filling the via. Opposing side surfaces of the upper portion are beyond opposing side surfaces of the lower portion.
Public/Granted literature
- US20150206810A1 STACKED SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD FOR THE SAME Public/Granted day:2015-07-23
Information query
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