Invention Grant
US09306013B2 Method of forming a gate shield in an ED-CMOS transistor and a base of a bipolar transistor using BICMOS technologies
有权
使用BICMOS技术在ED-CMOS晶体管和双极晶体管的基极上形成栅极屏蔽的方法
- Patent Title: Method of forming a gate shield in an ED-CMOS transistor and a base of a bipolar transistor using BICMOS technologies
- Patent Title (中): 使用BICMOS技术在ED-CMOS晶体管和双极晶体管的基极上形成栅极屏蔽的方法
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Application No.: US14286805Application Date: 2014-05-23
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Publication No.: US09306013B2Publication Date: 2016-04-05
- Inventor: Jeffrey A. Babcock , Alexei Sadovnikov
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Tuenlap D. Chan; Frank D. Cimino
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/66 ; H01L29/40
Abstract:
A method of fabricating a MOSFET transistor in a SiGe BICMOS technology and resulting structure having a drain-gate feedback capacitance shield formed between a gate electrode and the drain region. The shield does not overlap the gate and thereby minimizes effect on the input capacitance of the transistor. The process does not require complex or costly processing since the shield is composed of bipolar base material commonly used in SiGe BICMOS technologies.
Public/Granted literature
- US20150340448A1 METHOD FOR CREATION OF THE GATE SHIELD IN ANALOG/RF POWER ED-CMOS IN SIGE BICMOS TECHNOLOGIES Public/Granted day:2015-11-26
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