Invention Grant
US09312217B2 Methods for making a starting substrate wafer for semiconductor engineering having wafer through connections
有权
制造具有晶片通孔连接的用于半导体工程的起始衬底晶片的方法
- Patent Title: Methods for making a starting substrate wafer for semiconductor engineering having wafer through connections
- Patent Title (中): 制造具有晶片通孔连接的用于半导体工程的起始衬底晶片的方法
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Application No.: US12162599Application Date: 2007-01-31
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Publication No.: US09312217B2Publication Date: 2016-04-12
- Inventor: Edvard Kälvesten , Tomas Bauer , Thorbjörn Ebefors
- Applicant: Edvard Kälvesten , Tomas Bauer , Thorbjörn Ebefors
- Applicant Address: SE Jarfalla
- Assignee: Silex Microsystems AB
- Current Assignee: Silex Microsystems AB
- Current Assignee Address: SE Jarfalla
- Agency: Pierce Atwood LLP
- Agent Kevin M. Farrell; Reza Sadr
- Priority: SE0600214 20060201
- International Application: PCT/SE2007/050053 WO 20070131
- International Announcement: WO2007/089207 WO 20070809
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L21/768 ; H01L23/00

Abstract:
The invention relates to a method of making a starting substrate wafer for semiconductor engineering having electrical wafer through connections (140; 192). It comprises providing a wafer (110; 150) having a front side and a back side and having a base of low resistivity silicon and a layer of high resistivity material on the front side. On the wafer there are islands of low resistivity material in the layer of high resistivity material. The islands are in contact with the silicon base material. Trenches are etched from the back side of the wafer but not all the way through the wafer to provide insulating enclosures defining the wafer through connections (140; 192). The trenches are filled with insulating material. Then the front side of the wafer is grinded to expose the insulating material to create the wafer through connections. Also there is provided a wafer substrate for making integrated electronic circuits and/or components, comprising a low resistivity silicon base (110) having a high resistivity top layer (122) suitable for semiconductor engineering, characterized by having low resistivity wafer through connections (140).
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