发明授权
US09318693B2 Method for fabricating a damascene self-aligned ferroelectric random access memory (F-RAM) having a ferroelectric capacitor aligned with a three dimensional transistor structure
有权
用于制造具有与三维晶体管结构对准的铁电电容器的镶嵌自对准铁电随机存取存储器（F-RAM）的方法
- 专利标题： Method for fabricating a damascene self-aligned ferroelectric random access memory (F-RAM) having a ferroelectric capacitor aligned with a three dimensional transistor structure
- 专利标题（中）： 用于制造具有与三维晶体管结构对准的铁电电容器的镶嵌自对准铁电随机存取存储器（F-RAM）的方法
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申请号： US14010174申请日： 2013-08-26
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公开(公告)号： US09318693B2公开(公告)日： 2016-04-19
- 发明人: John Cronin , Shan Sun , Thomas Davenport
- 申请人： CYPRESS SEMICONDUCTOR CORPORATION
- 申请人地址： US CA San Jose
- 专利权人： CYPRESS SEMICONDUCTOR CORPORATION
- 当前专利权人： CYPRESS SEMICONDUCTOR CORPORATION
- 当前专利权人地址： US CA San Jose
- 主分类号： H01L21/00
- IPC分类号： H01L21/00 ; H01L43/02 ; H01L27/115 ; H01L27/22
摘要：
A method for a non-volatile, ferroelectric random access memory (F-RAM) device that includes a ferroelectric capacitor aligned with a preexisting structure is described. In one embodiment, the method includes forming an opening in an insulating layer over a contact in a planar surface of a substrate to expose at least a portion of the contact. Next a self-aligned contact (SAC) is formed electrically coupling to the contact, the SAC medially located in the opening and proximal to a sidewall thereof. A ferroelectric spacer is then formed in the opening medially of the SAC, and a top electrode spacer formed in the opening over the insulating cap and medially of the ferroelectric spacer.
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