Invention Grant
- Patent Title: Metrology pattern layout and method of use thereof
- Patent Title (中): 计量模式布局及其使用方法
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Application No.: US14228611Application Date: 2014-03-28
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Publication No.: US09323882B2Publication Date: 2016-04-26
- Inventor: Guoxiang Ning , Guido Ueberreiter , Lloyd C. Litt , Paul Ackmann
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Heslin Rothenberg Farley and Mesiti PC
- Agent Nicholas Mesiti
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A metrology pattern layout for a circuit structure is provided, the metrology pattern layout including a plurality of quadrants, in which quadrants a first wafer measurement pattern, a second wafer measurement pattern, a reticle registration pattern, and a reticle measurement pattern may be arranged to facilitate correlation of reticle metrology data with wafer metrology data. The reticle registration pattern may further include one or more outermost structural elements designed to protect other structural elements within the reticle measurement pattern from being modified in an optical proximity correction process. A method of optical proximity correction process is provided, in which a reticle measurement pattern may be obtained and classified to add or modify a rule set of the optical proximity correction process.
Public/Granted literature
- US20150278426A1 METROLOGY PATTERN LAYOUT AND METHOD OF USE THEREOF Public/Granted day:2015-10-01
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