Invention Grant
US09324632B2 Semiconductor structures with isolated ohmic trenches and stand-alone isolation trenches and related method
有权
具有隔离欧姆沟槽和独立隔离沟槽的半导体结构及相关方法
- Patent Title: Semiconductor structures with isolated ohmic trenches and stand-alone isolation trenches and related method
- Patent Title (中): 具有隔离欧姆沟槽和独立隔离沟槽的半导体结构及相关方法
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Application No.: US14288852Application Date: 2014-05-28
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Publication No.: US09324632B2Publication Date: 2016-04-26
- Inventor: Natalie B. Feilchenfeld , BethAnn Lawrence , Yun Shi
- Applicant: GLOBALFOUNDRIES INC.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Hoffman Warnick LLC
- Agent Michael LeStrange
- Main IPC: H01L21/76
- IPC: H01L21/76 ; H01L23/48 ; H01L21/768 ; H01L21/762 ; H01L29/06 ; H01L27/12

Abstract:
A method of forming a semiconductor structure in a semiconductor-on-insulator (SOI) substrate and semiconductor structure so formed are provided. The SOI substrate includes a semiconductor layer; a bulk semiconductor region underlying the semiconductor layer; and an insulation layer between the two. The method includes substantially simultaneously forming a first opening and a second opening extending from the semiconductor layer to the conductive region; introducing an insulating material to the side walls of the first opening; at least partially filling the first opening with a semiconductor material to provide an ohmic contact trench; and at least partially filling the second opening with an insulating material to form a device isolation trench. Insulating regions, for example, shallow trench isolation (STI) regions, may be formed about the device isolation trench and the ohmic contact trench. Semiconductor structures are also provided. The benefits of combining the features of SOI and STI structures are provided.
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