发明授权
US09325546B1 Data rate and PVT adaptation with programmable bias control in a SerDes receiver
有权
数据速率和PVT适配与SerDes接收机中的可编程偏置控制
- 专利标题: Data rate and PVT adaptation with programmable bias control in a SerDes receiver
- 专利标题(中): 数据速率和PVT适配与SerDes接收机中的可编程偏置控制
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申请号: US14541345申请日: 2014-11-14
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公开(公告)号: US09325546B1公开(公告)日: 2016-04-26
- 发明人: Mohammad S. Mobin , Weiwei Mao , Brett D. Hardy
- 申请人: LSI Corporation
- 申请人地址: SG Singapore
- 专利权人: Avago Technologies General IP (Singapore) Pte. Ltd.
- 当前专利权人: Avago Technologies General IP (Singapore) Pte. Ltd.
- 当前专利权人地址: SG Singapore
- 主分类号: H04L27/01
- IPC分类号: H04L27/01 ; H04L7/00
摘要:
Described embodiments provide for, in a SerDes device, an adaptation process that adjusts data path gain through programmable-bias based on process, voltage, temperature (PVT) and data rate changes. Such adaptation process extends bias current dynamic range, and low frequency gain can be programmed to a desired target range of values for a given variable gain amplifier (VGA) setting at any PVT and data rate corner. A receive (RX) data path structure auto-adapts data path gain through programmable bias based on sensed PVT and data rate changes. The low frequency attenuation/gain range is extended, and can be programmed to a desirable targeted range by a SerDes device RX adaptive process for a given VGA and linear equalizer (LEQ) setting at any given PVT and data rate condition.
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