Invention Grant
- Patent Title: Chip, chip package and die
- Patent Title (中): 芯片,芯片封装和裸片
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Application No.: US14101370Application Date: 2013-12-10
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Publication No.: US09331059B2Publication Date: 2016-05-03
- Inventor: Robert Allinger , Gottfried Beer , Juergen Hoegerl
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: INFINEON TECHNOLOGIES AG
- Current Assignee: INFINEON TECHNOLOGIES AG
- Current Assignee Address: DE Neubiberg
- Main IPC: H01L29/10
- IPC: H01L29/10 ; H01L23/58 ; H01L25/18 ; H01L21/66 ; H01L23/00 ; G01R31/28 ; H01L27/02

Abstract:
In various embodiments, a chip for a chip package is provided. The chip may include a substrate and an integrated circuit over the substrate. The integrated circuit may include a test circuit, for example a built-in self-test circuit, and an operation circuit, the test circuit including one or more first driver stages each having a first driver performance and the operation circuit including one or more second driver stages each having a second driver performance which is different from the first driver performance, first contacts electrically coupled with the first driver stages, and second contacts electrically coupled with the second driver stages, wherein the test circuit and the first contacts are configured to provide a test mode for testing the integrated circuit and wherein the operation circuit and the second contacts are configured to provide an operating mode of the integrated circuit being different from the test mode.
Public/Granted literature
- US20150162318A1 CHIP, CHIP PACKAGE AND DIE Public/Granted day:2015-06-11
Information query
IPC分类: