Methods of forming low-defect strain-relaxed layers on lattice-mismatched substrates and related semiconductor structures and devices

Invention Grant

US09343303B2 Methods of forming low-defect strain-relaxed layers on lattice-mismatched substrates and related semiconductor structures and devices 有权

Title translation: 在晶格失配衬底和相关半导体结构和器件上形成低缺陷应变松弛层的方法

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Patent Title: Methods of forming low-defect strain-relaxed layers on lattice-mismatched substrates and related semiconductor structures and devices
Patent Title (中): 在晶格失配衬底和相关半导体结构和器件上形成低缺陷应变松弛层的方法
Application No.: US14484511

Application Date: 2014-09-12
Publication No.: US09343303B2

Publication Date: 2016-05-17
Inventor: Wei-E Wang , Mark Stephen Rodder
Applicant: Wei-E Wang , Mark Stephen Rodder
Applicant Address: KR
Assignee: Samsung Electronics Co., Ltd.
Current Assignee: Samsung Electronics Co., Ltd.
Current Assignee Address: KR
Agency: Myers Bigel & Sibley, P.A.
Main IPC: H01L21/3063
IPC: H01L21/3063 ; H01L21/02 ; H01L21/324 ; H01L29/165 ; H01L29/786

Methods of forming low-defect strain-relaxed layers on lattice-mismatched substrates and related semiconductor structures and devices

Abstract:

Methods of forming strain-relaxing semiconductor layers are provided in which a porous region is formed in a surface of a semiconductor substrate. A first semiconductor layer that is lattice-matched with the semiconductor substrate is formed on the porous region. A second semiconductor layer is formed on the first semiconductor layer, the second semiconductor layer being a strained layer as formed. The second semiconductor layer is then relaxed.

Abstract(Chinese):

提供形成应变松弛半导体层的方法，其中在半导体衬底的表面中形成多孔区。在多孔区域上形成与半导体衬底晶格匹配的第一半导体层。第二半导体层形成在第一半导体层上，第二半导体层是形成的应变层。然后放松第二半导体层。

Public/Granted literature

US20150270120A1 METHODS OF FORMING LOW-DEFECT STRAIN-RELAXED LAYERS ON LATTICE-MISMATCHED SUBSTRATES AND RELATED SEMICONDUCTOR STRUCTURES AND DEVICES Public/Granted day:2015-09-24

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02	.半导体器件或其部件的制造或处理
H01L21/04	..至少具有一个跃变势垒或表面势垒的器件，例如PN结、耗尽层、载体集结层
H01L21/18	...器件有由周期表Ⅳ族元素或含有/不含有杂质的AⅢBⅤ族化合物构成的半导体，如掺杂材料
H01L21/30	....用H01L21/20至H01L21/26各组不包含的方法或设备处理半导体材料的（在半导体材料上制作电极的入H01L21/28）
H01L21/302	.....改变半导体材料的表面物理特性或形状的，例如腐蚀、抛光、切割
H01L21/306	......化学或电处理，例如电解腐蚀（形成绝缘层的入H01L21/31；绝缘层的后处理入H01L21/3105）
H01L21/3063	.......电解腐蚀