Extending a microphone interface. One microphone interface extension includes a controller, a parent microphone, and a child microphone. The controller outputs a controller clock signal. The parent microphone receives the controller clock signal and generates a first data signal. The child microphone generates a second data signal and outputs the second data signal to the first parent microphone. The parent microphone receives the second data signal from the child microphone and outputs a combined data signal to the controller based on the first data signal and the second data signal. The parent microphone outputs the combined data signal to the controller on a phase of a microphone clock signal derived from the controller clock signal.