Invention Grant
- Patent Title: Data integrity management in memory systems
- Patent Title (中): 内存系统中的数据完整性管理
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Application No.: US13798370Application Date: 2013-03-13
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Publication No.: US09354973B2Publication Date: 2016-05-31
- Inventor: Yogesh B. Wakchaure , Xin Guo , Robert E. Frickey
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Chapin IP Law, LLC
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F11/10

Abstract:
Data management logic allocates a portion such as a single plane of a respective multi-plane non-volatile memory device to store parity information for corresponding data striped across multiple planes of multiple non-volatile memory devices. According to one configuration, the data management logic as discussed herein generates parity data based on (a data stripe of) non-parity data stored in multiple planes of multiple different memory devices. The data management logic stores the parity data in the storage plane allocated to store the parity information. Additional configurations include: reserving a parity block amongst multiple non-parity data blocks to store parity data and reserving a parity page amongst multiple non-parity data pages to store parity data.
Public/Granted literature
- US20140281813A1 DATA INTEGRITY MANAGEMENT IN MEMORY SYSTEMS Public/Granted day:2014-09-18
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