Invention Grant
US09361036B2 Correction of block errors for a system having non-volatile memory
有权
纠正具有非易失性存储器的系统的块错误
- Patent Title: Correction of block errors for a system having non-volatile memory
- Patent Title (中): 纠正具有非易失性存储器的系统的块错误
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Application No.: US14754468Application Date: 2015-06-29
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Publication No.: US09361036B2Publication Date: 2016-06-07
- Inventor: Andrew W. Vogan , Daniel J. Post
- Applicant: Apple Inc.
- Applicant Address: US CA Cupertino
- Assignee: APPLE INC.
- Current Assignee: APPLE INC.
- Current Assignee Address: US CA Cupertino
- Agency: Van Court & Aldridge LLP
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G06F3/06 ; G06F11/10
Abstract:
Systems and methods are disclosed for correcting block errors. In particular, a system can store a parity page per page-modulo, where a pre-determined number of pages of a block or a band of the NVM may be allocated as page-modulo XOR (“PMX”) parity pages. This enables a space efficient approach for recovering from single-block data errors.
Public/Granted literature
- US20150301760A1 CORRECTION OF BLOCK ERRORS FOR A SYSTEM HAVING NON-VOLATILE MEMORY Public/Granted day:2015-10-22
Information query
