发明授权
US09361101B2 Extension of CPU context-state management for micro-architecture state
有权
扩展用于微架构状态的CPU上下文状态管理
- 专利标题： Extension of CPU context-state management for micro-architecture state
- 专利标题（中）： 扩展用于微架构状态的CPU上下文状态管理
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申请号： US13538252申请日： 2012-06-29
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公开(公告)号： US09361101B2公开(公告)日： 2016-06-07
- 发明人: Efraim Rotem , Eliezer Weissmann , Michael Mishaeli , Boris Ginzburg , Alon Naveh
- 申请人： Efraim Rotem , Eliezer Weissmann , Michael Mishaeli , Boris Ginzburg , Alon Naveh
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Nicholson De Vos Webster & Elliott LLP
- 主分类号： G06F9/46
- IPC分类号： G06F9/46 ; G06F9/30 ; G06F9/38
摘要：
A processor saves micro-architectural contexts to increase the efficiency of code execution and power management. A save instruction is executed to store a micro-architectural state and an architectural state of a processor in a common buffer of a memory upon a context switch that suspends the execution of a process. The micro-architectural state contains performance data resulting from the execution of the process. A restore instruction is executed to retrieve the micro-architectural state and the architectural state from the common buffer upon a resumed execution of the process. Power management hardware then uses the micro-architectural state as an intermediate starting point for the resumed execution.