Semiconductor devices including a capping layer and methods of forming semiconductor devices including a capping layer

Invention Grant

US09368362B2 Semiconductor devices including a capping layer and methods of forming semiconductor devices including a capping layer 有权

Title translation: 包括封盖层的半导体器件和形成包括覆盖层的半导体器件的方法

Please log in to see more content

Patent Title: Semiconductor devices including a capping layer and methods of forming semiconductor devices including a capping layer
Patent Title (中): 包括封盖层的半导体器件和形成包括覆盖层的半导体器件的方法
Application No.: US14284674

Application Date: 2014-05-22
Publication No.: US09368362B2

Publication Date: 2016-06-14
Inventor: Sangho Rha , Jongmin Baek , Wookyung You , Sanghoon Ahn , Nae-In Lee
Applicant: Sangho Rha , Jongmin Baek , Wookyung You , Sanghoon Ahn , Nae-In Lee
Applicant Address: KR
Assignee: Samsung Electronics Co., Ltd.
Current Assignee: Samsung Electronics Co., Ltd.
Current Assignee Address: KR
Agency: Myers Bigel & Sibley, P.A.
Priority: KR10-2013-0091685 20130801
Main IPC: H01L21/311
IPC: H01L21/311 ; H01L21/306 ; H01L21/768

Semiconductor devices including a capping layer and methods of forming semiconductor devices including a capping layer

Abstract:

Methods of forming a semiconductor device are provided. A method of forming a semiconductor device may include forming a capping layer on a metal pattern and on an adjacent portion of an insulating layer, the capping layer comprising a first etch selectivity, with respect to the insulating layer, on the metal pattern and a second etch selectivity, with respect to the insulating layer, on the portion of the insulating layer. Moreover, the method may include forming a recess region adjacent the metal pattern by removing the capping layer from the portion of the insulating layer. At least a portion of the capping layer may remain on an uppermost surface of the metal pattern after removing the capping layer from the portion of the insulating layer. Related semiconductor devices are also provided.

Abstract(Chinese):

提供了形成半导体器件的方法。形成半导体器件的方法可以包括在金属图案上和在绝缘层的相邻部分上形成覆盖层，所述覆盖层包括相对于绝缘层在金属图案上的第一蚀刻选择性，第二在绝缘层的部分上相对于绝缘层的蚀刻选择性。此外，该方法可以包括通过从绝缘层的部分去除覆盖层来形成与金属图案相邻的凹陷区域。在从绝缘层的部分去除覆盖层之后，覆盖层的至少一部分可以保留在金属图案的最上表面上。还提供了相关的半导体器件。

Public/Granted literature

US20150037980A1 SEMICONDUCTOR DEVICES INCLUDING A CAPPING LAYER AND METHODS OF FORMING SEMICONDUCTOR DEVICES INCLUDING A CAPPING LAYER Public/Granted day:2015-02-05

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02	.半导体器件或其部件的制造或处理
H01L21/04	..至少具有一个跃变势垒或表面势垒的器件，例如PN结、耗尽层、载体集结层
H01L21/18	...器件有由周期表Ⅳ族元素或含有/不含有杂质的AⅢBⅤ族化合物构成的半导体，如掺杂材料
H01L21/30	....用H01L21/20至H01L21/26各组不包含的方法或设备处理半导体材料的（在半导体材料上制作电极的入H01L21/28）
H01L21/31	.....在半导体材料上形成绝缘层的，例如用于掩膜的或应用光刻技术的（密封层入H01L21/56）；以及这些层的后处理；这些层的材料的选择
H01L21/3105	......后处理
H01L21/311	.......绝缘层的刻蚀