Method and apparatus for multiplying a signed first operand na bits and a signed second operand nb bits, wherein na and nb are different positive integer numbers, the method comprising generating single bit products of pairs of a single bit from the signed first operand and a single bit from the signed second operand with a logical AND function to produce na times nb single bit products, selectively inverting for the signed first operand and the signed second operands the single bit products of the first operand bit na−1 multiplied with the second operand bits 0 to nb−2, selectively inverting the single bit products of the signed second operand bits 0 to na−2 multiplied with the signed second operand bit nb−1, after the step of inverting adding the single bit products in accordance with their respective order for producing an intermediate product, and adding a ‘1’ bit value at bit positions nb−1, na−1 and na+nb−1 for receiving a final product.