Increasing operating frequency of circuit designs using dynamically modified timing constraints

Invention Grant

US09372953B1 Increasing operating frequency of circuit designs using dynamically modified timing constraints 有权

Title translation: 使用动态修改的时序约束提高电路设计的工作频率

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Patent Title: Increasing operating frequency of circuit designs using dynamically modified timing constraints
Patent Title (中): 使用动态修改的时序约束提高电路设计的工作频率
Application No.: US14494978

Application Date: 2014-09-24
Publication No.: US09372953B1

Publication Date: 2016-06-21
Inventor: Shant Chandrakar , Ilya K. Ganusov
Applicant: Xilinx, Inc.
Applicant Address: US CA San Jose
Assignee: XILINX, INC.
Current Assignee: XILINX, INC.
Current Assignee Address: US CA San Jose
Agent Kevin T. Cuenot
Main IPC: G06F17/50
IPC: G06F17/50

Increasing operating frequency of circuit designs using dynamically modified timing constraints

Abstract:

Processing a circuit design includes determining that an operating frequency for a first placement and routing for the circuit design does not exceed a target operating frequency, distinguishing between loop paths and feed-forward paths in the circuit design, and, responsive to determining that the operating frequency does not exceed the target operating frequency, relaxing timing constraints of the feed-forward paths using a processor. A second placement and routing is performed on the loop paths and the feed-forward paths of the circuit design.

Abstract(Chinese):

处理电路设计包括确定用于电路设计的第一布置和布线的工作频率不超过目标工作频率，区分电路设计中的环路径和前馈路径，并且响应于确定操作频率不超过目标工作频率，使用处理器的前馈路径的放松时序约束。在电路设计的环路径和前馈路径上进行第二次放置和布线。

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