Invention Grant
US09372993B2 Methods and apparatus to protect memory regions during low-power states 有权
在低功耗状态下保护存储器区域的方法和装置

Methods and apparatus to protect memory regions during low-power states
Abstract:
A disclosed example method involves configuring a processor to, when transitioning the processor system to a low-power mode, use a key and a random or pseudo-random value to generate a first signature based on a sample of memory regions to be protected during the low-power mode, the memory regions based on a manufacturer required regions table and a third-party required regions table. The disclosed example method also involves configuring a processor to, during a resume process of the processor system from the low-power mode, generate a second signature based on the sample of the memory regions protected during the low-power mode. The disclosed example method also involves configuring a processor to, when the first signature matches the second signature, cause the processor system to resume from the low-power mode, and when the first signature does not match the second signature, generate an error.
Information query
Patent Agency Ranking
0/0