Invention Grant
- Patent Title: Operand cache design
- Patent Title (中): 操作数缓存设计
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Application No.: US13971811Application Date: 2013-08-20
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Publication No.: US09378146B2Publication Date: 2016-06-28
- Inventor: James S. Blomgren , Terence M. Potter , Timothy A. Olson , Andrew M. Havlir
- Applicant: Apple Inc.
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Agency: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
- Main IPC: G06F12/08
- IPC: G06F12/08 ; G06F9/30 ; G06F9/38

Abstract:
Instructions may require one or more operands to be executed, which may be provided from a register file. In the context of a GPU, however, a register file may be a relatively large structure, and reading from a register file may be energy and/or time intensive An operand cache may be used to store a subset of operands, and may use less power and have quicker access times than the register file. Selectors (e.g., multiplexers) may be used to read operands from the operand cache. Power savings may be achieved in some embodiments by activating only a subset of the selectors, which may be done by activators (e.g. flip-flops). Operands may also be concurrently provided to two or more locations via forwarding, which may be accomplished via a source selection unit in some embodiments. Operand forwarding may also reduce power and/or speed execution in one or more embodiments.
Public/Granted literature
- US20150058573A1 OPERAND CACHE DESIGN Public/Granted day:2015-02-26
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