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US09379732B2 Delta-sigma modulator with reduced integrator requirements 有权
降低积分器要求的Delta-Σ调制器

Delta-sigma modulator with reduced integrator requirements
Abstract:
Requirements placed on the first integrator of a filter in a continuous-time delta-feedback modulator may be reduced by using circuitry to reduce the speed of a signal provided to the first integrator of the modulator. The reduction in speed applied to the signal received at the first integrator may then be compensated with circuitry elsewhere in the modulator, such that the net effect of the slow down and speed up of signals does not affect the output of the modulator. The sigma-delta modulator may be implemented in converters, such as an analog-to-digital converter (ADC).
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