Invention Grant
- Patent Title: Block-based time-frequency interleaving and de-interleaving
- Patent Title (中): 基于块的时频交织和解交织
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Application No.: US14197151Application Date: 2014-03-04
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Publication No.: US09385905B2Publication Date: 2016-07-05
- Inventor: Bernard Arambepola , Thushara Hewavithana
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Garrett IP, LLC
- Main IPC: H04L27/26
- IPC: H04L27/26 ; H04L1/00

Abstract:
Block-based interleaving to process a block of sub-carriers as a two-dimensional array defined by a frequency dimension and a time dimension. For each symbol of the array a cell is selected at each frequency index of the array in a diagonal wrap-around fashion. The array may be traversed with a modulo-based index computed as a function of an incrementing frequency index, a symbol index, and a modulus defined by a depth of the array. Cells may be selected as indicated by the frequency and time indices, and/or as indicated by a bit-reversed representation of the frequency index and/or the time index. A block interleaver may be configured to time interleave without impacting frequency, or interleave in time and frequency. Frequency interleaving may performed with the bit-reversed representation of the frequency index.
Public/Granted literature
- US20140247803A1 Block-Based Time-Frequency Interleaving and De-Interleaving Public/Granted day:2014-09-04
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