Invention Grant
US09387613B2 Semiconductor formation arrangement 有权
半导体形成布置

Semiconductor formation arrangement
Abstract:
A semiconductor package formation arrangement includes a mold housing with an interior cavity having top, bottom and first and second end sides. A gate for transferring liquefied molding material extends to the first end side. A lead frame having a top surface, a rear surface opposite the top surface and a mold flow modifier forms a first cavity section between the top surface and the top side and a second cavity section between the rear surface and the bottom side. A topology of the lead frame causes liquefied molding material to fill the first and second cavity sections at different rates. The mold flow modifier extends away from the lead frame so as to compensate for the difference between the first and second rates.
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