Invention Grant
US09390214B2 Methods of preparing layouts for semiconductor devices, photomasks formed using the layouts, and semiconductor devices fabricated using the photomasks
有权
制备半导体器件布局的方法，使用该布局形成的光掩模以及使用光掩模制造的半导体器件
- Patent Title: Methods of preparing layouts for semiconductor devices, photomasks formed using the layouts, and semiconductor devices fabricated using the photomasks
- Patent Title (中): 制备半导体器件布局的方法，使用该布局形成的光掩模以及使用光掩模制造的半导体器件
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Application No.: US14576695Application Date: 2014-12-19
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Publication No.: US09390214B2Publication Date: 2016-07-12
- Inventor: HunKook Lee , Hongsoo Kim , Juyeon Lee
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel & Sibley, P.A.
- Priority: KR10-2014-0028462 20140311
- Main IPC: H01L21/70
- IPC: H01L21/70 ; G06F17/50 ; G03F1/00 ; H01L27/088 ; H01L29/06 ; H01L21/8234 ; H01L27/02
Abstract:
Methods of preparing layouts for semiconductor devices and semiconductor devices fabricated using the layouts are provided. Preparing the layouts for semiconductor devices may include disposing assistant patterns near a main gate pattern that is provided on a weak active pattern. The weak active pattern may be, for example, an outermost one of active patterns and may be one expected to have an increased width during a fabrication process.
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