Invention Grant
US09397182B2 Transistor structure with silicided source and drain extensions and process for fabrication
有权
具有硅化源和漏极延伸的晶体管结构以及制造工艺
- Patent Title: Transistor structure with silicided source and drain extensions and process for fabrication
- Patent Title (中): 具有硅化源和漏极延伸的晶体管结构以及制造工艺
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Application No.: US14497729Application Date: 2014-09-26
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Publication No.: US09397182B2Publication Date: 2016-07-19
- Inventor: Manoj Mehrotra
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Jacqueline J. Garner; Frank D. Cimino
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/45 ; H01L29/78 ; H01L21/285 ; H01L21/8238 ; H01L29/417

Abstract:
A transistor is formed in a semiconductor substrate with a gate over a channel region, source/drain extension regions in the substrate adjacent the channel region, and source/drain regions in the substrate adjacent the source/drain extension regions. Silicide is formed on the source/drain extension regions and the source/drain regions so that the silicide has a first thickness over the source/drain extension regions and a second thickness over source/drain regions, with the second thickness being greater than the first thickness. Silicide on the source/drain extension regions lowers transistor series resistance which boosts transistor performance and also protects the source/drain extension regions from silicon loss and silicon damage during contact etch.
Public/Granted literature
- US20150008532A1 TRANSISTOR STRUCTURE WITH SILICIDED SOURCE AND DRAIN EXTENSIONS AND PROCESS FOR FABRICATION Public/Granted day:2015-01-08
Information query
IPC分类: