Invention Grant
US09397182B2 Transistor structure with silicided source and drain extensions and process for fabrication 有权
具有硅化源和漏极延伸的晶体管结构以及制造工艺

Transistor structure with silicided source and drain extensions and process for fabrication
Abstract:
A transistor is formed in a semiconductor substrate with a gate over a channel region, source/drain extension regions in the substrate adjacent the channel region, and source/drain regions in the substrate adjacent the source/drain extension regions. Silicide is formed on the source/drain extension regions and the source/drain regions so that the silicide has a first thickness over the source/drain extension regions and a second thickness over source/drain regions, with the second thickness being greater than the first thickness. Silicide on the source/drain extension regions lowers transistor series resistance which boosts transistor performance and also protects the source/drain extension regions from silicon loss and silicon damage during contact etch.
Information query
Patent Agency Ranking
0/0