Invention Grant
- Patent Title: Methods of forming 3D devices with dielectric isolation and a strained channel region
- Patent Title (中): 用介电隔离和应变通道区形成3D器件的方法
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Application No.: US14867800Application Date: 2015-09-28
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Publication No.: US09397200B2Publication Date: 2016-07-19
- Inventor: Yi Qi
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Amerson Law Firm, PLLC
- Main IPC: H01L27/01
- IPC: H01L27/01 ; H01L29/66 ; H01L29/06

Abstract:
One illustrative method involves forming a FinFET device or a nanowire device by forming a sacrificial gate structure above a substantially vertically oriented structure comprised of first and second semiconductor materials, forming epi semiconductor material in the source/drain regions, removing the sacrificial gate structure so as to define a replacement gate cavity and to expose the first and second semiconductor materials within the gate cavity, performing an etching process through the replacement gate cavity to selectively remove the exposed first sacrificial semiconductor material relative to the exposed second semiconductor material so as to define a gap under the second semiconductor material within the gate cavity, filling the gap with an insulating material, and forming a replacement gate structure in the gate cavity.
Public/Granted literature
- US20160118472A1 METHODS OF FORMING 3D DEVICES WITH DIELECTRIC ISOLATION AND A STRAINED CHANNEL REGION Public/Granted day:2016-04-28
Information query
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