发明授权
- 专利标题： Quad flat no-lead package and manufacturing method thereof
- 专利标题（中）： 四边形无铅封装及其制造方法
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申请号： US14656631申请日： 2015-03-12
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公开(公告)号： US09401318B2公开(公告)日： 2016-07-26
- 发明人: Chi-Jin Shih
- 申请人： ChipMOS Technologies Inc.
- 申请人地址： TW Hsinchu
- 专利权人： ChipMOS Technologies Inc.
- 当前专利权人： ChipMOS Technologies Inc.
- 当前专利权人地址： TW Hsinchu
- 代理机构： Patterson & Sheridan, LLP
- 优先权： TW103113159A 20140410
- 主分类号： H01L23/495
- IPC分类号： H01L23/495 ; H01L23/00 ; H01L21/56 ; H01L21/48 ; H01L23/31
摘要：
A quad flat no-lead package includes an encapsulant, and a plurality of chip pads, a plurality of bond pads and a chip disposed in the encapsulant. Each chip pad is connected to at least one of the chip pads adjacent thereto by a first extending portion. The chip pads and the bond pads are arranged in an array. The chip pads are disposed at the center of the array and the bond pads are disposed around the chip pads. Each of the bond pads and at least one of the bond pads or one of the chip pads adjacent thereto each has a second extending portion formed therebetween and corresponding to each other. Every two of the second extending portions corresponding to each other are separated by a groove. The chip is mounted on a top surface of the chip pads and is electrically coupled to the bond pads.