Invention Grant
- Patent Title: Semiconductor module
- Patent Title (中): 半导体模块
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Application No.: US14435686Application Date: 2013-10-25
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Publication No.: US09402311B2Publication Date: 2016-07-26
- Inventor: Takashi Sunaga , Noboru Kaneko , Osamu Miyoshi
- Applicant: NSK Ltd.
- Applicant Address: JP Tokyo
- Assignee: NSK Ltd.
- Current Assignee: NSK Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Crowell & Moring LLP
- Priority: JP2012-243683 20121105; JP2013-155329 20130726
- International Application: PCT/JP2013/006340 WO 20131025
- International Announcement: WO2014/068935 WO 20140508
- Main IPC: H05K7/00
- IPC: H05K7/00 ; H05K1/09 ; H01L25/07 ; H01L25/18 ; H01L23/373 ; H01L23/498 ; H01L23/495 ; H05K1/02 ; H05K1/05 ; H05K1/18 ; H01L23/00

Abstract:
A semiconductor module includes a copper connector jointing an electrode formed on a top surface of a bare-chip transistor and a wiring pattern out of plural wiring patterns via a solder. The copper connector includes an electrode jointing portion jointed to the electrode of the bare-chip transistor and a substrate jointing portion arranged to face the electrode-jointing portion and jointed to the wiring pattern. The width W1 of the electrode jointing portion in a direction perpendicular to one direction is smaller than the width W2 of the substrate jointing portion in the direction perpendicular to the one direction.
Public/Granted literature
- US20150289369A1 Semiconductor Module Public/Granted day:2015-10-08
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