Invention Grant
US09405551B2 Creating an isolated execution environment in a co-designed processor
有权
在共同设计的处理器中创建一个独立的执行环境
- Patent Title: Creating an isolated execution environment in a co-designed processor
- Patent Title (中): 在共同设计的处理器中创建一个独立的执行环境
-
Application No.: US13795720Application Date: 2013-03-12
-
Publication No.: US09405551B2Publication Date: 2016-08-02
- Inventor: Koichi Yamada , Palanivel Rajan Shanmugavelayutham , Scott D. Rodgers , Barry E. Huntley , James D. Beaney, Jr. , Boaz Tamir
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: G06F15/00
- IPC: G06F15/00 ; G06F15/76 ; G06F9/38 ; G06F9/44 ; G06F9/455

Abstract:
In an embodiment, a processor includes a binary translation (BT) container having code to generate a binary translation of a first code segment and to store the binary translation in a translation cache, a host entity logic to manage the BT container and to identify the first code segment, and protection logic to isolate the BT container from a software stack. In this way, the BT container is configured to be transparent to the software stack. Other embodiments are described and claimed.
Public/Granted literature
- US20140281376A1 Creating An Isolated Execution Environment In A Co-Designed Processor Public/Granted day:2014-09-18
Information query