An over-voltage protection circuit suitable for use at a front-end of an on-chip analog module such as an analog-to-digital converter (ADC) includes an input potential divider that can be disconnected from the module when the module is idle (or working on any other input such as the ADC sampling another channel causing the current channel to be idle) while still providing protection for front-end devices. A first NMOS transistor pair connects or disconnects the potential divider to or from ground in response to a control signal, and a second transistor pair including a NMOS transistor and a PMOS transistor ensures that the output does not rise above the supply voltage.