发明授权
US09411390B2 Integrated circuit device having power domains and partitions based on use case power optimization
有权
具有功率域和基于用例功率优化的分区的集成电路器件
- 专利标题: Integrated circuit device having power domains and partitions based on use case power optimization
- 专利标题(中): 具有功率域和基于用例功率优化的分区的集成电路器件
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申请号: US12029404申请日: 2008-02-11
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公开(公告)号: US09411390B2公开(公告)日: 2016-08-09
- 发明人: Brian Smith , Parthasarathy Sriram , Stephane Le Provost
- 申请人: Brian Smith , Parthasarathy Sriram , Stephane Le Provost
- 申请人地址: US CA Santa Clara
- 专利权人: NVIDIA CORPORATION
- 当前专利权人: NVIDIA CORPORATION
- 当前专利权人地址: US CA Santa Clara
- 主分类号: G06F1/32
- IPC分类号: G06F1/32
摘要:
A programmable SoC (system on a chip) having optimized power domains and power islands. The SoC is an integrated circuit device including a plurality of power domains, each of the power domains having a respective voltage rail to supply power to the power domain. A plurality of power islands are included within the integrated circuit device, wherein each power domain includes at least one power island. A plurality of functional blocks are included within the integrated circuit device, wherein each power island includes at least one functional block. Each functional block is configured to provide a specific device functionality. The integrated circuit device adjusts power consumption in relation to a requested device functionality by individually turning on or turning off power to a selected one or more power domains, and for each turned on power domain, individually power gating one or more power islands.
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