Invention Grant
- Patent Title: Multi-core heterogeneous system translation lookaside buffer coherency
- Patent Title (中): 多核异构系统翻译后备缓存一致性
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Application No.: US14046341Application Date: 2013-10-04
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Publication No.: US09411745B2Publication Date: 2016-08-09
- Inventor: Jian Shen , Lew Go Chua-Eoan
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: The Marbury Law Group, PLLC
- Main IPC: G06F12/10
- IPC: G06F12/10

Abstract:
Methods, devices, and instructions for performing a reverse translation lookaside buffer (TLB) look-up using a physical address input, including obtaining with a first processor the physical address input, wherein the physical address input indicates a physical address corresponding to a shared memory, obtaining a first mask associated with a first virtual address from a first TLB entry within a TLB associated with the first processor, wherein the obtained first mask is a bit pattern, obtaining from the first TLB entry a first page frame number associated with the shared memory, applying the obtained first mask to the obtained first page frame number to generate a first value, applying the obtained first mask to the obtained physical address input to generate a second value, and comparing the first value and the second value to determine whether the first value and the second value match.
Public/Granted literature
- US20150100753A1 MULTI-CORE HETEROGENEOUS SYSTEM TRANSLATION LOOKASIDE BUFFER COHERENCY Public/Granted day:2015-04-09
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