A LCD panel is proposed, which meets analog display mode and memory display mode. The LCD panel includes a capacitive element, first to third switch elements, and a circuit. The first switch element turns ON during a first operation for writing pixel potential from signal line to the capacitive element, and turns OFF during a second operation. The second and third switch elements turn OFF during the first operation. The second switch element turns ON during a readout period in the second operation, to read out the pixel potential from the capacitive element. The third switch element turns ON during a write period in the second operation, to rewrite the pixel potential into the capacitive element. The circuit restores a logic level of the pixel potential read out from the capacitive element, and rewrites inversion of the restored logic level to the capacitive element.