Invention Grant
- Patent Title: Circuitry useful for clock generation and distribution
- Patent Title (中): 电路对时钟发生和分配有用
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Application No.: US14473715Application Date: 2014-08-29
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Publication No.: US09432013B2Publication Date: 2016-08-30
- Inventor: Ian Juso Dedic , David Timothy Enright
- Applicant: SOCIONEXT INC.
- Applicant Address: JP Yokohama
- Assignee: SOCIONEXT INC.
- Current Assignee: SOCIONEXT INC.
- Current Assignee Address: JP Yokohama
- Agency: Arent Fox LLP
- Priority: EP13184038 20130912
- Main IPC: H04B3/28
- IPC: H04B3/28 ; H03K5/15 ; G06F1/10 ; H01L49/02

Abstract:
An integrated circuit comprising an inductor arrangement, the arrangement comprising: four inductors adjacently located in a group and arranged to define two rows and two columns, wherein: the integrated circuit is configured to cause two of those inductors diagonally opposite from one another in the arrangement to produce an electromagnetic field having a first phase, and to cause the other two of those inductors to produce an electromagnetic field having a second phase, the first and second phases being substantially in antiphase.
Public/Granted literature
- US20150070066A1 CIRCUITRY USEFUL FOR CLOCK GENERATION AND DISTRIBUTION Public/Granted day:2015-03-12
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