Invention Grant
- Patent Title: Scanner overlay correction system and method
- Patent Title (中): 扫描仪覆盖校正系统和方法
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Application No.: US14585457Application Date: 2014-12-30
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Publication No.: US09442392B2Publication Date: 2016-09-13
- Inventor: Yen-Di Tsen , Yi-Ping Hsieh , Chen-Yen Huang , Shin-Rung Lu , Jong-I Mou
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Duane Morris LLP
- Agent Steven E. Koffs
- Main IPC: G03F7/20
- IPC: G03F7/20 ; G03F9/00 ; H01L21/00 ; H01L21/027 ; H01L21/66

Abstract:
A method of processing first and second semiconductor wafers is provided. Each of the first and second semiconductor wafers has a first layer and a second layer over the first layer. A first lithographic process is performed on the first layer over the first semiconductor wafer using a first inter-field correction and a first intra-field correction. An overlay error of the first lithographic process is determined. A second inter-field correction and a second intra-field correction are computed based on the first inter-field correction, the first intra-field correction, and the measured overlay error. A second lithographic process is performed on the second layer over the second semiconductor wafer, based on the second inter-field correction and the second intra-field correction.
Public/Granted literature
- US20150170904A1 SCANNER OVERLAY CORRECTION SYSTEM AND METHOD Public/Granted day:2015-06-18
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