Invention Grant
US09442732B2 Running state power saving via reduced instructions per clock operation
有权
通过每个时钟操作减少指令来运行状态省电
- Patent Title: Running state power saving via reduced instructions per clock operation
- Patent Title (中): 通过每个时钟操作减少指令来运行状态省电
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Application No.: US13777104Application Date: 2013-02-26
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Publication No.: US09442732B2Publication Date: 2016-09-13
- Inventor: G. Glenn Henry , Terry Parks
- Applicant: VIA Technologies, Inc.
- Applicant Address: TW New Taipei
- Assignee: VIA TECHNOLOGIES, INC.
- Current Assignee: VIA TECHNOLOGIES, INC.
- Current Assignee Address: TW New Taipei
- Agent E. Alan Davis; James W. Huffman; Eric W. Cernyar
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F1/32

Abstract:
A microprocessor includes functional units and control registers writeable to cause the functional units to institute actions that reduce the instructions-per-clock rate of the microprocessor to reduce power consumption when the microprocessor is operating in its lowest performance running state. Examples of the actions include in-order vs. out-of-order execution, serial vs. parallel cache access and single vs. multiple instruction issue, retire, translation and/or formatting per clock cycle. The actions may be instituted only if additional conditions exist, such as residing in the lowest performance running state for a minimum time, not running in a higher performance state for more than a maximum time, a user did not disable the feature, the microprocessor supports multiple running states and the operating system supports multiple running states.
Public/Granted literature
- US20130311755A1 RUNNING STATE POWER SAVING VIA REDUCED INSTRUCTIONS PER CLOCK OPERATION Public/Granted day:2013-11-21
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